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XR-T5683A
...the analog plus company TM
PCM Line Interface Chip
June 1997-3
FEATURES D Single 5V Supply D Receiver Input Can Be Either Balanced or Unbalanced D Up To 8.448Mbps Operation In Both Tx and Rx Directions
D TTL Compatible Interface D Device Can Be Used as a Line Interface Unit Without Clock Recovery APPLICATIONS D T1, T2, E1 & E2 Rates, PCM Line Interface D Network Multiplexing and Terminating Equipment
GENERAL DESCRIPTION The XR-T5683A is a PCM line interface chip consisting of both transmit and receive circuitry. This device is offered in a plastic dual in-line (PDIP) or in a surface mount package (SOIC). The maximum bit rate of the chip is 8.448Mbps, and the signal level to the receiver can be ORDERING INFORMATION
Part No. XR-T5683AIP XR-T5683AID Package 18 Lead 300 Mil PDIP 18 Lead 300 Mil JEDEC SOIC Operating Temperature Range -40C to +85C -40C to +85C
attenuated by -10dB cable loss at one-half the bit rate. At nominal supply voltage operation, the typical current consumption is 40mA.
BLOCK DIAGRAM
1 PDC Positive Threshold Comparator TTLBuffer 11 RPOS RXDATA+ 2 RXDATA- 3 TTLBuffer Negative Threshold Comparator 8 RCLK 4 TTLBuffer TE
Peak Detector
10 RNEG 6 TANK BIAS
BIAS RVCC 9 RGND 7 TVCC 18 TPOS 17 TCLK 16 TNEG 12 TGND 14 Open Collector Driver BIAS
5
BIAS
Open Collector Driver 13 TXDATA+ 15 TXDATA-
Figure 1. Block Diagram
Rev. 2.01
E1995
EXAR Corporation, 48720 Kato Road, Fremont, CA 94538 z (510) 668-7000 z FAX (510) 668-7017 1
XR-T5683A
PIN CONFIGURATION
PDC RXDATA+ RXDATATE BIAS TANK BIAS RGND RCLK RVCC
1 2 3 4 5 6 7 8 9 18 17 16 15 14 13 12 11 10
TVCC TPOS TCLK TXDATATGND TXDATA+ TNEG RPOS RNEG
PDC RXDATA+ RXDATATE BIAS TANK BIAS RGND RCLK RVCC
1 2 3 4 5 6 7 8 9
18 17 16 15 14 13 12 11 10
TVCC TPOS TCLK TXDATATGND TXDATA+ TNEG RPOS RNEG
18 Lead PDIP (0.300")
18 Lead SOIC (JEDEC, 0.300")
PIN DESCRIPTION
Pin # 1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 Symbol PDC RXDATA+ RXDATATE BIAS TANK BIAS RGND RCLK RVCC RNEG RPOS TNEG TXDATA+ TGND TXDATATCLK TPOS TVCC O I I O O I O O I I O O O Type Description Peak Detector Capacitor. This pin should be connected to a 0.1F capacitor. Receive Analog Input Positive. Line analog input. Receive Analog Input Negative. Line analog input. Tank Excitation Output. This output connects to one side of the tank circuitry. Bias. This output is to be connected to the center tap of the receive transformer. Tank Bias. The tank circuitry is biased via this output. Receiver Ground. To minimize ground interference a separate pin is used to ground the receive section. Recovered Receive Clock. Recovered clock signal to the terminal equipment. Receive Supply Voltage. 5V supply voltage to the receive section. Receive Negative Data. Negative pulse data output to the terminal equipment (active low). Receive Positive Data. Positive pulse data output to the terminal equipment (active low). Transmit Negative Data. TNEG is valid while TCLK is high. Transmit Positive Output. Transmit bipolar signal is driven to the line via a transformer. Transmit Ground. Transmit Negative Output. Transmit bipolar signal is driven to the line via a transformer. Transmit Clock. Timing element for TPOS and TNEG. Transmit Positive Data. TPOS is valid while TCLK is high. Transmit Supply Voltage. 5V supply voltage to the transmit section.
Rev. 2.01 2
XR-T5683A
ELECTRICAL CHARACTERISTICS
Test Conditions: VCC = 5.0V "5%, TA = 25C, Unless Otherwise Specified.
Parameters DC Electrical Characteristics Supply Voltage Supply Current Receiver Section Tank Drive Current Clock Output Low Clock Output High Data Output Low Data Output High Transmitter Section Driver Output Low Output Leakage Current Input High Voltage Input Low Voltage Input Low Current Input High Current Output Low Current AC Electrical Characteristics Receiver Section Input Level Loss Input Signal Alarm Level Input Impedance at 8,448MHz Clock Duty Cycle Clock Rise & Fall Time Data Pulse Width 35 35 6 1.6 2.5 50 20 50 75 65 6.6 Vpp Vpp k % ns % of clock period Measured Between Pin 2 & 3 Measured Between Pin 2 & 3, Alarm on Pull Data Output High Measured Between Pin 2 & 3, With Sinewave Input Measured at Pin 8 at 2.0V Measured at Pin 8, CL = 15pF Measured at Pin 10 & 11, at 1V DC Level, Cable Loss = 0 2.2 0.6 0.8 0 1.0 100 VCC 0.8 -1.6 40 40 V A V V mA A mA Measured at Pin 13 & 15, IOL = 40mA Measured in Off State, Output Pull-up to + 20V Measured at Pin 12, 16 & 17, IOL= 40mA, VOL = 1.0V Measured at Pin 12, 16 & 17, Output Off Measured at Pin 12, 16 & 17, Input Low Voltage = 0. 4V Measured at Pin 12, 16 & 17, Input High Voltage = 2.7V Measured at Pin 13 & 15, VOL = 1.0V 3.0 3.0 300 500 0.3 3.6 0.3 3.6 0.6 700 0.6 A V V V V Measured at Pin 4, VCC = 5V Measured at Pin 8, IOL = 1.6mA Measured at Pin 8, IOH = -400A Measured at Pin 10 & 11, IOL = 1.6mA Measured at Pin 10 & 11, IOH = -400A 4.75 5 40 5.25 55 V mA Total Current to Pin 9 & Pin 18 Transmitter Outputs Open Min. Typ. Max. Unit Conditions
Notes Bold face parameters are covered by production test and guaranteed over operating temperature range.
Rev. 2.01 3
XR-T5683A
ELECTRICAL CHARACTERISTICS (CONT'D)
Parameters AC Electrical Characteristics (Cont'd) Transmitter Section Pulse Width at 8.448MHz Output Rise Time Output Fall Time Output Pulse Imbalance 53 12 12 2.5 65 25 25 ns ns ns ns Measured at Pin 13 & 15, See Figure 6 See Figure 5 See Figure 5 At 50% Output Level Min. Typ. Max. Unit Conditions
Specifications are subject to change without notice
Notes Bold face parameters are covered by production test and guaranteed over operating temperature range.
ABSOLUTE MAXIMUM RATINGS Supply Voltage . . . . . . . . . . . . . . . . . . . . . . . . . . . . +20V Storage Temperature . . . . . . . . . . . . . . -65C to +150C
SYSTEM DESCRIPTION The incoming bipolar PCM signal which is attenuated and distorted by the cable is applied to the threshold comparator and the peak detector. The peak detector generates a DC reference for the threshold comparator for data and clock extraction. An external tank circuit tuned to the appropriate frequency is added for the later operation. The clock signal, data (+) and data (-) all go through a similar level shifter to be converted into TTL level to be compatible for digital processing. In the transmit direction, the output drivers consist of two identical TTL inputs with open collector output stages. The maximum low level current these output stages can sink is 40mA. With full width data (NRZ) applied to the inputs together with a synchronized clock, the output will generate a bipolar signal when driving a center-tapped transformer. A block diagram of the XR-T5683A is shown in Figure 1. The clock recovery uses an external tank circuit. The receive data will create an excitation for the tank circuitry which in turn will create a recovered, received clock (RCLK).
Rev. 2.01 4
XR-T5683A
Table 1 shows typical expected jitter tolerance. The following measurements have been done at a transmission rate of T1 (1.544MHz). (See Figure 2).
Jitter 10Hz 100Hz 500Hz 1kHz 2kHz 3kHz 4kHz
1.544Mbs in UI >10UI >10UI >10UI 6.5UI 3.3UI 2.1UI 1.5UI
Jitter 5kHz 8kHz 10kHz 32kHz 50kHz 77kHz
1.544Mbs in UI 1.3UI 0.8UI 0.7UI 0.5UI 0.45UI 0.45UI
-
-
VCC = +5V "5%, TA = 25C Table 1. Jitter Tolerance at 1.544Mbps with 6db Cable Loss
Jitter Generator HP3785B (transmitter side) Clock
6db Cable Attenuation RXDATA+ XR-T5683A RXDATARX
RPOS RCLK RNEG
TPOS TCLK TNEG
XR-T5683A TX
Clock Phase Shift Circuit Pattern Generator HP3781B
TXDATA+
TXDATA-
Jitter Analyzer HP3785B (Receive Side)
Figure 2. Jitter Measurement Set-up
Rev. 2.01 5
XR-T5683A
RXDATA+
RCLK Output at Pin 8 RPOS Output at Pin 11 RNEG Output at Pin 10
Figure 3. Receiver Timing Diagram With 1-1-1-1-1-1 Pattern
TCLK Clock to Pin 16
TPOS to Pin 17 TNEG to Pin 12
Bipolar Signal at Transformer Output
Figure 4. Transmitter Input Timing Diagram
Rev. 2.01 6
XR-T5683A
VCC = 5V
0.1F
100 Output Pin 13 & 15
Pin 9 & 18 8.448MHz Pulse Generator Input XR-T5683A Pin 12,16,171 Pin 7 & 14 0V
CI=15pF2 0V
Notes 1 Inputs that are not connected to pulse generator will be tied to V CC via 1K resistor. 2 C1 includes probe and jig capacitance.
Figure 5. Test Circuit
59ns
<5ns Input Pulse From Generator 90% 1.5V 90% 1.5V
<5ns 3V
10% 15ns Typ.
10% 15ns Typ.
0V
Output From Pin 13 or Pin 15
90% 50% 10% Pulse Width Fall Time 50% 10%
90%
+5V
Vol
Rise Time
Figure 6. Transmitter Test Circuit and Switching Waveforms (Measured at 8.448Mbps)
Rev. 2.01 7
XR-T5683A
VCC 0.1F 18 TVCC TXDATA+ RING 3 PE65415 1:1:1 0.1F 5 RXDATABIAS TXDATA15 56 PE65415 1:1:1 13 56 RING T2 TIP
TIP
T1 390
2
RXDATA+
4 R C L 6 0.1F
TE
TGND
14
TANK BIAS 16 17 12 11 10 8
TCLK VCC 9 RV CC 1 PDC TPOS TNEG RPOS RNEG RCLK 7 RGND U1 XR-T5683A
TCLK TPOS TNEG RPOS RNEG RCLK
0.1F
0.1F
Figure 7. Application Circuit
Rev. 2.01 8
XR-T5683A
INPUT AND OUTPUT TRANSFORMERS Pulse Engineering types PE-65415, PE-65771 or PE-65835 transformers, may be used for both the input and output transformers. These three parts, which are all 1CT:2CT turns ratio and have similar electrical specifications, are wound on small, epoxy-encapsulated,
Schott-Part Number 24443 24444 Nominal Inductance 48Hy with CT 5Hy with CT
torroid cores. They differ in physical size, operating temperature range and voltage isolation. These transformers are suitable for operation over the 1.544 through 8.448Mbps range which includes T1, T2, E1 and E2.
Bit Rate (MBIT/S) 1.544(T1) 2.048(E1) 6.312(T2) 6.448(E2) Tuning Cap. (See Note) 200pF 100pF 100pF 60pF
Mechanical Style RM 5 Core, 4 Pin Bobbin 14 x 8 Potcore, 6 Pin Bobbin
Table 2. Inductor Selection
Notes - Capacitor values shown combined with typical stray capacitance will normally resonate the tank circuit at the specific bit rate. - The center-tapped inductor (L) eliminates clock amplifier overload by reducing the signal amplitude applied to T5683A pin 4. While feeding pseudo-random data into the receive input, tune this inductor for minimum jitter on the recovered clock (pin 8) as viewed on an oscilloscope. - R, which may be in the 20K to 50k range, is optional and may be used to lower clock recovery circuit Q if desired.
Magnetic Supplier Information: Pulse Telecom Product Group P.O. Box 12235 San Diego, CA 92112 Tel. (619) 674-8100 Fax. (619) 674-8262 John Marshall Schott Corporation 1838 Elm Hill Pike, Suite 100 Nashville, TN 37210 Tel. (615) 889-8800 Fax (615) 885-0834
Rev. 2.01 9
XR-T5683A
18 LEAD PLASTIC DUAL-IN-LINE (300 MIL PDIP)
Rev. 1.00
18 1 D A L
10 9 E1 E
A2
Seating Plane
A1 B e B1
eA eB
C
INCHES SYMBOL A A1 A2 B B1 C D E E1 e eA eB L MIN 0.145 0.015 0.115 0.014 0.030 0.008 0.845 0.300 0.240 MAX 0.210 0.070 0.195 0.024 0.070 0.014 0.925 0.325 0.280
MILLIMETERS MIN 3.68 0.38 2.92 0.36 0.76 0.20 21.46 7.62 6.10 MAX 5.33 1.78 4.95 0.56 1.78 0.38 23.50 8.26 7.11
0.100 BSC 0.300 BSC 0.310 0.115 0 0.430 0.160 15
2.54 BSC 7.62 BSC 7.87 2.92 0 10.92 4.06 15
Note: The control dimension is the inch column
Rev. 2.01 10
XR-T5683A
18 LEAD SMALL OUTLINE (300 MIL JEDEC SOIC)
Rev. 1.00
D
18
10
E
1 9
H
C Seating Plane e B A1 L A
INCHES SYMBOL A A1 B C D E e H L MIN 0.093 0.004 0.013 0.009 0.447 0.291 MAX 0.104 0.012 0.020 0.013 0.463 0.299
MILLIMETERS MIN 2.35 0.10 0.33 0.23 11.35 7.40 MAX 2.65 0.30 0.51 0.32 11.75 7.60
0.050 BSC 0.394 0.016 0 0.419 0.050 8
1.27 BSC 10.00 0.40 0 10.65 1.27 8
Note: The control dimension is the millimeter column
Rev. 2.01 11
XR-T5683A
NOTICE EXAR Corporation reserves the right to make changes to the products contained in this publication in order to improve design, performance or reliability. EXAR Corporation assumes no responsibility for the use of any circuits described herein, conveys no license under any patent or other right, and makes no representation that the circuits are free of patent infringement. Charts and schedules contained herein are only for illustration purposes and may vary depending upon a user's specific application. While the information in this publication has been carefully checked; no responsibility, however, is assumed for inaccuracies. EXAR Corporation does not recommend the use of any of its products in life support applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significantly affect its safety or effectiveness. Products are not authorized for use in such applications unless EXAR Corporation receives, in writing, assurances to its satisfaction that: (a) the risk of injury or damage has been minimized; (b) the user assumes all such risks; (c) potential liability of EXAR Corporation is adequately protected under the circumstances. Copyright 1995 EXAR Corporation Datasheet June 1997 Reproduction, in part or whole, without the prior written consent of EXAR Corporation is prohibited.
Rev. 2.01 12

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